--VGA signal generator with resolution 640x480

library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity circle_vga is

port( 
		clk      		: in std_logic;	
		hsync,vsync  	: out std_logic;					        
		red 			   : out std_logic_vector(2 downto 0);	  
		green 		   : out std_logic_vector(2 downto 0);	  
		blue  		   : out std_logic_vector(1 downto 0)	  
);
end circle_vga;

architecture behavioral of circle_vga is

--component dcm_inst
--	port(
--		CLKIN_IN : IN std_logic;          
--		CLKFX_OUT : OUT std_logic
--		);
--end component;

constant h_max : std_logic_vector(9 downto 0) := conv_std_logic_vector(799,10); -- 799 max number of pixels (640 + additional pixels for synchronization)
constant v_max : std_logic_vector(9 downto 0) := conv_std_logic_vector(524,10); -- 524 max number of lines (480 + additional lines for synchronization)

signal clk_25 			: std_logic;
signal video_out		: std_logic_vector(7 downto 0);
signal hcnt, vcnt	: std_logic_vector(9 downto 0) := "0000000000";

BEGIN

-- process with drawing circle on the screen
circle: process(hcnt, vcnt)
	variable x0 : integer range 0 to 640; -- x0 - coordinate of the circle's center
	variable y0 : integer range 0 to 480; -- y0 - coordinate of the circle's center
	variable x : integer range 0 to 640; -- actual position of pixel in horizontal
	variable y : integer range 0 to 480; -- actual position of pixel in vertical
begin
	x0:=300;
	y0:=200;
	x:=conv_integer(hcnt); --convert bit vector to integer
	y:=conv_integer(vcnt); 
	if (x-x0)*(x-x0)+(y-y0)*(y-y0)<=2500 then -- circle equation in the cartesian coordinate system (radius r = 50 pixels)
		video_out<="11111111"; 
	else
		video_out<="00000000";
	end if;
end process;


--R (3 bits) G (3 bits) and B (2 bits) outputs on the VGA screen
red   <= video_out(7 downto 5);
green <= video_out(4 downto 2);
blue  <= video_out(1 downto 0);

-- VGA synchronization signal generator
vga_generator: process(clk_25)

begin


if (clk_25'event and clk_25 = '1') then

-- hcnt signal counts number of pixels (640 + additional pixels for synchronization)
	if (hcnt >= h_max) then
		hcnt <= "0000000000";
	else
		hcnt <= hcnt + "0000000001";
	end if;

-- generator of horizontal synchronization signal 
	if (hcnt >= 656) and (hcnt <= 751) then
		hsync <= '0';
	else
		hsync <= '1';
	end if;

-- vcnt signal counts number of lines in vertical direction (480 + additional lines for synchronization)
	if (vcnt >= v_max) and (hcnt >= 799) then
		vcnt <= "0000000000";
	else 
		if (hcnt = 799) then
			vcnt <= vcnt + "0000000001";
		end if;
	end if;

-- generator of vertical synchronization signal
	if (vcnt >= 490) and (vcnt <= 491) then
		vsync <= '0';
	else
		vsync <= '1';
	end if;
	
end if;
end process vga_generator;

--DCM1 : dcm_inst port map(CLKIN_IN => clk , CLKFX_OUT => clk_25); -- assignement of DCM ports to internal signals in the architecture

END behavioral;